summaryrefslogtreecommitdiffstats
path: root/ardkbd.c
blob: 0b62bdad7f076eda5c9d75300b6910e711771c9c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>

#include <stdbool.h>
#include <stdint.h>


static volatile int8_t kbd_state = 0;

static volatile uint8_t kbd_input = 0;
static volatile uint8_t kbd_output = 0;
static volatile uint8_t kbd_flags = 0;


static volatile uint8_t ts = 10;


#define KBD_FLAG_ERROR  (_BV(0))
#define KBD_FLAG_BREAK  (_BV(1))
#define KBD_FLAG_EXT    (_BV(2))

#define KBD_CODE_UP     0xe075
#define KBD_CODE_LEFT   0xe06b
#define KBD_CODE_DOWN   0xe072
#define KBD_CODE_RIGHT  0xe074



static inline bool kbd_data() {
	return (PINC & (1 << 0));
}

static inline bool kbd_clock() {
	return (PINC & (1 << 1));
}


ISR(PCINT1_vect) {
	if (kbd_clock())
		return;

	if (kbd_state < 0) {
		if (kbd_state >= -8) {
			if (kbd_output & (1 << (-1-kbd_state)))
				PORTC |= 0x01;
			else
				PORTC &= ~0x01;

			kbd_state--;
			return;
		}

		if (kbd_state == -9) {
			if ((__builtin_popcount(kbd_output) & 1) == 0)
				PORTC |= 0x01;
			else
				PORTC &= ~0x01;

			kbd_state--;
			return;
		}

		if (kbd_state == -10) {
			kbd_state--;

			DDRC &= ~0x01;
			PORTC |= 0x01;
			return;
		}

		kbd_state = 0;

		return;
	}

	bool data = kbd_data();

	if (kbd_state == 0) {
		if (!data) { /* start bit */
			kbd_input = 0;
			kbd_state++;
		}

		return;
	}

	if (kbd_state <= 8) {
		kbd_input |= (data << (kbd_state-1));
		kbd_state++;
		return;
	}

	if (kbd_state == 9) {
		if ((__builtin_popcount(kbd_input) & 1) == data)
			kbd_flags |= KBD_FLAG_ERROR;

		kbd_state++;
		return;
	}

	kbd_state = 0;

	if (kbd_flags & KBD_FLAG_ERROR) {
		/* Retry */
		return;
	}

	if (kbd_input == 0xe0) {
		kbd_flags |= KBD_FLAG_EXT;
		return;
	}

	if (kbd_input == 0xf0) {
		kbd_flags |= KBD_FLAG_BREAK;
		return;
	}

	uint16_t code = kbd_input;
	if (kbd_flags & KBD_FLAG_EXT)
		code |= 0xe000;

	if (!(kbd_flags & KBD_FLAG_BREAK)) {
		switch (code) {
		case KBD_CODE_UP:
			if (ts > 0)
				ts--;
			break;

		case KBD_CODE_DOWN:
			if (ts < 31)
				ts++;
			break;
		}
	}

	kbd_flags = 0;
}


void kbd_send(uint8_t command) {
	while (kbd_state) {} /* wait for idle */

	DDRC |= 0x02;
	PORTC &= ~0x02;
	_delay_us(100);

	DDRC |= 0x01;
	PORTC &= ~0x01;
	_delay_us(10);

	DDRC &= ~0x02;
	PORTC |= 0x02;

	kbd_output = command;
	kbd_state = -1;

	/* wait for idle */
	while (kbd_state) {}
	while (!kbd_state) {}
	while (kbd_state) {}
}


int main(void) {
	DDRB  = 0xff;
	PORTB = 0;

	DDRC  = 0x00;
	PORTC = 0x03;

	PCMSK1 = (1 << PCINT9);
	PCICR = (1 << PCIE1);

	sei();

	kbd_send(0xff);

	uint8_t l = 0;

	while(true) {
		uint8_t state = PORTB ^ 0x20;
		PORTB = state;

		if (state & 0x20) {
			l = (l+1)%3;

			kbd_send(0xed);
			kbd_send(1 << l);
		}

		uint32_t i;
		for (i = 0; i < (1 << ts); i++)
			_delay_ms(1);
	}

	return 0;
}